Search from the Journals, Articles, and Headings
Advanced Search (Beta)
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...

اشفاق احمد

اشفاق احمدرجحان ساز شخصیت
پیدائش:
معروف دانشور، ادیب، ڈرامہ نگار، تجزیہ نگار، سفر نامہ نگار اور براڈ کاسٹر جناب اشفاق احمد خان بھارت کے شہر ہوشیار پور کے ایک چھوٹے سے گاؤں خان پور میں ڈاکٹر محمد خان کے گھر 22 اگست 1925ء کو بروز پیر پیدا ہوئے۔
تعلیم:
اشفاق احمد کی پیدائش کے بعد اْن کے والد ڈاکٹر محمد خان کا تبادلہ خان پور سے فیروز پور ہو گیا۔ اشفاق احمد نے اپنی تعلیمی زندگی کا آغاز اسی گاؤں فیروز پورسے کیا۔ اور فیروز پور کے ایک قصبہ مکستر سے میٹرک کا امتحان پاس کیا۔اشفاق احمد نے ایف۔ اے کا امتحان بھی اسی قصبہ فیروز پور کے ایک کالج ‘‘رام سکھ داس ’’ سے پاس کیا۔ اس کے علاوہ بی۔اے کا امتحان امتیازی نمبروں کے ساتھ فیروز پور کے ‘‘آر، ایس،ڈی ‘‘RSDکالج سے پاس کپا۔
پاکستان ہجرت:
قیام پاکستان کے بعد اشفاق احمد اپنے خاندان کے ہمراہ فیروز پور (بھارت) سے ہجرت کر کے پاکستان آ گئے۔ پاکستان آنے کے بعد اشفاق احمد نے گورنمنٹ کالج لاہور کے ‘‘شعبہ اردو ’’ میں داخلہ لیا۔یہاں معروف اساتذہ سے علم حاصل کیا۔اْس زمانے میں بانو قدسیہ نے بھی ایم۔ اے اردو میں داخلہ لیا۔ یہ وہ دور تھا جب اورینٹل کالج پنجاب یونیورسٹی میں اردو کی کلاسیں ابھی شروع نہیں ہوئی تھیں۔
شادی:
جن دنوں اشفاق احمد گورنمنٹ کالج لاہور میں ایم۔ اے اردو کے طالب علم تھے۔ بانو قدسیہ ان کی ہم جماعت تھی۔ ذہنی ہم آہنگی دونوں کو اس قدر قریب لے آئی کہ دونوں نے شادی کا فیصلہ کیا۔ان کے والد ایک غیر پٹھان لڑکی کو بہو بنانے کے حق میں نہ تھے۔جس کی وجہ سے شادی کے بعد ان کو مجبوراً اپنا گھر چھوڑنا پڑا۔
تصانیف:
اشفاق احمد کی تصانیف میں افسانے، ناول، ٹی وی ڈرامے، ریڈیائی ڈرامے، فیچر اور سفر نامے شامل...

عصرِ حاضر میں ضمان کی اہمیت و ضرورت

Almighty Allah commanded preserving the dignity of health and wealth of every Muslim. Islam too, emphasises protection of these very elements and guarantees protection of minority's rights in Muslim societies. This prohibits any one, who grabs the property of any other. Injunction of Holy Quran and hadith in this matter are very much clear, which are described in the following lines. The sacred shariah also issued severe punishment to siphon off the waye for these crimes against human dignity by maintaining fool proof surveillance at the doors of all such vulnerabilities. Even the Holy prophet, in his last surmon warned in these words: "Beware! Maintaining the dignity of your blood, property and respect is as important for you as the dignity of this month, this sity and this day (9th zilhaj). In the following discussion all these injunctions of Holy Quran and Hadith would be analyzed.

Efficient Architectural Transformation of Multirate Recursive Filters

Computationally efficient architectures of multirate recursive filters are presented in this thesis. An analytical transformation is introduced that converts an IIR filter into an efficient decimation/interpolation filter. The transformation is named as merged delay transformation. This transformation is applicable to first order and second order recursive difference equations. The transfer function of the transformed filter is expressed in the form of H(z M ) so that noble identity of multirate signal processing may be invoked. An N th order filter is required to be implemented in parallel using first order and second order sections. In case of decimation, a down sampler follows an anti-aliasing filter. With the help of merged delay transformation, the filter is transformed and arranged to provide filtering and down sampling in the same stage. This is possible if the filter is implemented in parallel form. Architecture is introduced where down samplers and delays are arranged on the input side. A commutator switch model operating at an M-times higher rate than the output can replace the input down samplers with successive delays. This results in M-to-1 sample rate reduction without changing the filter characteristics. The frequency response and stability of the filter is not disturbed. In case of interpolation, an up sampler precedes an anti-imaging filter. Using merged delay transformation we are able to arrange the up samplers after the sub-filters in parallel paths with successive delays. The up samplers and delays are implemented by a commutator switch model operating at L-times faster rate EFFICIENT ARCHITECTURAL TRANSFORMATION OF MULTIRATE RECURSIVE FILTERS Ph.D Thesis UET, Taxila. 2008 12than the input. Output sampling rate is increased by L and 1-to-L interpolation is achieved. The stability and filter characteristics are unchanged. Filtering and sample rate changes are achieved in the same stage. This avoids the chain of integrators and differentiators as required in a variety of cascade integrator comb (CIC) architectures. Computational costs in terms of number of multiplies per output sample are compared with polyphase FIR structures and IIR structures. The cost reduction increases with increasing values of M or L. For M = 10, the reduction in cost is 82.64% as compared to FIR decimation filters. As compared to IIR structures, the reduction of the order of 48% is achieved. In case of interpolation, the cost reduction is of the order of 45% as compared to polyphase IIR structures. The reduction in cost is about 68% as compared to polyphase FIR. The transformed filters are implemented in Verilog HDL and mapped to an FPGA of Spartan-II technology. Parallel implementation of the filters provides benefits of parallel processing. Increased throughput and less hardware requirement are the important characteristics of this architecture. The technique is expected to find wide use in multirate signal processing such as efficient sample rate conversion from CD’s to Digital Audio Tape and Digital Transmitter/Receivers
Asian Research Index Whatsapp Chanel
Asian Research Index Whatsapp Chanel

Join our Whatsapp Channel to get regular updates.