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فرزند محمد سمیع صدیقی [شعبہء مالیات کے امین ]
شعبہ مالیات کے امین
افسوس ہے کہ ۱۴؍ ستمبر کو دارالعلوم ندوۃ العلماء کے شعبہ مالیات کے امین و معتمد، دنیوی زندگی کی امانت کو ادا کرنے کے بعد اپنے مالک حقیقی سے جاملے، وہ استاذ الاساتذہ محمد سمیع صدیقی مرحوم کے صاحبزادے تھے جن کا تعلق ندوے سے مکانی ہی نہیں روحانی بھی ہمیشہ رہا، وہ ندوہ اور خصوصاً مولانا سید ابوالحسن علی ندویؒ کے عاشقوں میں تھے اور خود ایک باکمال اہل قلم تھے، ایسے باکمال کا اٹھ جانا بڑا سانحہ ہے، اﷲتعالیٰ ان کے حسنات کو قبول فرما کر بلند درجات سے نوازے۔ ( عمیر الصدیق دریابادی ندوی ، ستمبر ۲۰۱۰ء)
Principles and Rules of Jihad: A Juristic Approach
Jihad is a sacred term and a sacred endeavor as well, but unfortunately it has been misunderstood and misused in many cases, therefore its elaboration and explanation is needed from various aspects. This article deals with the principles and rules of Jihad. At the beginning, the concept of jihad has been expounded, then motivations of war of the period of ignorance have been discussed. Those motivations have been brought in to focus which Islam has recognized. For instance defending of religion and faith, safeguarding the territory of Muslims, eradication of persecution, eradication of Internal enemies, support for the oppressed Muslims etc. The purpose of jihad has also been discussed, while principles and rules of jihad make the next part of the article. In this regard views of a well-known medieval Hanafi jurist Imam Hasan al- Shaybani with the commentary of contemporary scholars have been produced.L Ow P Ower and a Rea E Fficient a Rchitecture D Esign for M Oderate R Ate D Igital S Ystems
Recent advancements in semiconductor technology have sparked a struggle among researchers and manufacturers to best utilize the modern technology trends in designing state of the art digital systems. Devices with small form factors, offering high throughput and low power consumption are very much in demand. These factors have actuated active research in the field of area efficient, low power high speed digital system design. This research is an effort to contribute in this active research area by adding a new dimension to digital design methodology. In addition to this, the research also makes use of established digital design methodologies augmented with the research studies outcome to produce novel designs around few exemplary applications. The prime focus of this study is to explore Trace Scheduling Methodology and extracts novel algorithm-to-hardware mapping features for efficient hardware design. Trace scheduling is a topic under compiler design theory and is efficiently used to design compliers for VLIW machines. The research, inspired by trace scheduling, introduces the concept of efficient hardware design through identification of traces in the algorithm and their mapping for optimal hardware affinity. The research work first investigates this concept on a relatively simpler design such as an FIR filter in order to establish a link between the two technology domains which are compiler theory and digital system design. Later, the devised methodology is applied on applications from machine vision and cryptography to design area efficient, low power, moderate data rate architectures. The research presents novel hardware mapping of Peak Sorter and AdvancedEncryption Standard (AES) algorithm for moderately high data rate applications. The designs offer a best area performance tradeoff. The utility of the technique developed in this research can be found in mapping complex algorithms in Very Large Scale Integrated (VLSI) circuits and digital design compilersJournals by Discipline
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